💻Author Recreates Voodoo Graphics Pipeline on FPGA
Voodoo Graphics on an FPGA? Yes, and it works
TL;DR
Developer recreates 3dfx Voodoo Graphics pipeline on FPGA using SystemVerilog, forming a DOS PC with Voodoo graphics. KV260 board runs the design, while DE10-Nano lacks space.
Developer spent a month adding features and improving performance in z486_MiSTer, culminating in a SystemVerilog implementation of the 3dfx Voodoo Graphics, named zSST. This FPGA-based recreation combines with z486 CPU and PC hardware to form a DOS PC with Voodoo graphics. KV260 board runs the design, but DE10-Nano lacks space. The Voodoo card, known for its impressive 3D capabilities, turns triangles into pixels at 50 million per second, demonstrating its impact on early 3D gaming. This project showcases the evolution of 3D graphics hardware and its emulation on modern FPGA technology.
Key Points
zSST is a SystemVerilog implementation of the 3dfx Voodoo Graphics, or SST-1, recreating its rendering pipeline.
The FPGA-based design combines with z486 CPU and PC hardware to form a DOS PC with Voodoo graphics.
KV260 board has enough logic, DSP blocks, on-chip memory, and DDR bandwidth to run the combined design.
DE10-Nano lacks the necessary resources to accommodate the graphics addition, highlighting KV260's superiority.
The original Voodoo card operates at a peak of 50 million textured, depth-tested output pixels per second.
Why It Matters
If you're interested in 3D graphics history or FPGA emulation projects, this is a must-read. The zSST project demonstrates the evolution of 3D graphics hardware and its emulation on modern FPGA technology, offering insights into early 3D gaming and the technical intricacies of the Voodoo Graphics card.
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