⚡Nvidia Locks Up TSMC Advanced Packaging Capacity as CoWoS Becomes AI Bottleneck
Nvidia Secures TSMC Packaging Capacity
TL;DR
Nvidia reserves most of TSMC's advanced CoWoS packaging capacity as it becomes a critical AI chip bottleneck.
Nvidia has reserved the majority of TSMC's most advanced chip packaging capacity, with Chip on Wafer on Substrate (CoWoS) technology growing at an 80% compound annual growth rate. The lesser-known chipmaking step is becoming the next critical bottleneck for AI chip production, with TSMC outsourcing some steps to ASE and Amkor.
Key Points
Nvidia reserved majority of TSMC's advanced packaging capacity
CoWoS technology growing at 80% CAGR
Advanced packaging becoming next AI chip bottleneck
TSMC outsourcing some steps to ASE and Amkor
Why It Matters
The packaging bottleneck highlights that AI chip supply constraints are shifting downstream, potentially limiting AI infrastructure buildout even as raw chip manufacturing capacity increases.
Frequently Asked Questions
Why does this matter?
The packaging bottleneck highlights that AI chip supply constraints are shifting downstream, potentially limiting AI infrastructure buildout even as raw chip manufacturing capacity increases.
What happened?
Nvidia reserves most of TSMC's advanced CoWoS packaging capacity as it becomes a critical AI chip bottleneck.
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